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IEEE

A 10-bit 100-MS/s 1.2-mW Asynchronous SAR ADC with Low-power Dynamic Logic Units in 65nm CMOS

Abstract: This paper presents a 10-bit 100-MS/s 1.2-mW asynchronous SAR ADC with low-power dynamic logic units in a 65nm CMOS process. To reduce power consumption, a dynamic logic cell capable of ...